J-Link Ultra debug probe enables power debugging

IAR Systems today announced the availability of IAR J-Link Ultra debug probe. Designed for use with ARM Cortex devices, this JTAG/SWD probe supports IAR Systems’ recently announced pioneering power debugging technology available within IAR Embedded Workbench. The J-Link Ultra JTAG/SWD debug probe features higher performance with USB 2.0 Hi-speed interface, SWO frequency up to 25 MHz and JTAG speeds up to 25 MHz.

By using the probe’s capability to measure a target’s power consumption combined with the power debugging technology in IAR Embedded Workbench, it is possible to correlate current sampling alongside program execution and analyze the software’s influence on power consumption. The combination of IAR J-Link Ultra and IAR Embedded Workbench provides developers with the means to optimize the application in order to minimize power consumption.

The probe supports ARM7, ARM9 and ARM11, together with Cortex-M0, -M1, M3, -M4 and -R4 core. It offers a seamless integration with IAR Embedded Workbench. .

Unlike previous J-Link probes, the J-Link Ultra now supports the self-clocking Manchester code, thus removing the need to specify the correct MCU speed in the debugger.

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