The device has four dedicated output dividers with bus-programmable division (integers up to 1024) and phase delay, and automatic synchronisation. The dividers also have pin-strapping capability for hardwired programming at system power-up. The AD9508 supports up to four differential, or eight single-ended outputs and three logic levels: LVDS (1.65 GHz), HSTL (1.65 GHz), and CMOS (250 MHz).
AD9508 1.65 GHz Clock Buffer and Divider Key Features:
•RMS jitter in HSTL output mode:
o 41 fs @ 622.08 MHz (12 kHz to 20 MHz)
o 72 fs @ 622.08 MHZ (20 kHz to 80 MHz)
•Dividers are pin-strappable for division factors of 1,2,4,8, or 16
•Outputs: 4 LVDS or HSTL; 8 single-ended CMOS
•Output-to-output skew: <48 ps (LVDS) •Supply voltage: 2.5 V/3.3 V Analog Devices’ AD9508 clock buffer and divider IC is available now priced at $4.25 (USD) each in 1,000 quantities. The AD9508 is available in a 24-lead LFCSP package with temperature range of -40˚C to 85˚C. The AD9508 Clock buffer/divider complements ADI’s clock generator and high-speed data converter portfolio.