Codasip and EnSilica announce a strategic licensing agreement of Codasip’s CHERI-enabled (capability hardware enhanced RISC instructions) embedded CPU IP product from its 700 family of cores. EnSilica will integrate the CPU into its quantum-resilient commercial-off-the-shelf (COTS) processor device. This chip will be generally available through standard distribution channels.
The new COTS device is designed for deployment at the cyber-physical boundary, where state-of-the-art security is paramount. For use in defence, industrial, automotive, and aerospace markets, these systems must achieve the highest levels of resilience. CHERI provides a step-change in security by deterministically removing the memory-safety vulnerabilities that are all too common in networked devices and enabling performant fine-grained compartmentalisation of software.
Codasip is a founding member of the CHERI Alliance. The company’s engineers have been instrumental in defining the CHERI-RISC-V specification and creating a wide range of commercial embedded cores, receiving numerous awards for this work.
Dr Ron Black, CEO of Codasip, said: “Our strategic partnership with EnSilica is already gaining momentum as we work together to unlock the full potential of our leading-edge 32-bit and 64-bit CHERI-RISC-V CPUs. This first business partnership with EnSilica around our CHERI-RISC-V embedded processor marks an exciting milestone. CHERI is a game-changing technology and brings huge potential to work on further business opportunities in the future.”
Ian Lankshear, CEO of EnSilica, added: “Partnering with Codasip allows us to bring commercial-grade CHERI-enabled security into our next-generation secure quantum-resilient microcontroller. This collaboration strengthens our ability to deliver functionally safe and cyber-resilient silicon for long-lifecycle applications that demand the highest levels of trust and assurance.”
