Verific’s software serves as the front end to numerous Field Programmable Gate Array (FPGA) and Electronic Design Automation (EDA) tools for synthesis, simulation, debug, test and verification applications. It is distributed as C++ source code and compiles on all 32- and 64-bit Unix, Linux, and Windows operating systems. Licenses come with support and maintenance.
“Verific continually proves to us why its software is considered the industry’s de facto standard front end,” says Paul van Besouw, president and chief executive officer of Oasys. “It’s a company devoted to building outstanding products, supported with exceptional customer service, which makes it a pleasure to work with.”
Michiel Ligthart, Verific’s chief operating officer, adds: “Oasys is an impressive company already amassing enthusiasts who are using RealTime Designer on large, complex designs. We’re delighted to be a part of its success.”