Twelve bit ADC meets demanding T&M requirements

Fast measurements over a wide frequency spectrum:

• Wide bandwidth: At eight gigahertz, the ADC12DJ5200RF claims to enable engineers to achieve as much as 20% higher analog input bandwidth than competing devices, which gives engineers the ability to directly digitise very high frequencies without the power consumption, cost and size of additional down-conversion.
• Fast 12-bit ADC: In dual-channel mode, the ADC12DJ5200RF samples at 5.2 gigasamples per second (GSPS) and captures instantaneous bandwidth (IBW) as high as 2.6GHz at 12-bit resolution. In single-channel mode, the new ultra-high-speed ADC samples at 10.4 GSPS and captures IBW up to 5.2GHz.
• Efficient interface: As the first standalone GSPS ADC to support the JESD204C standard interface, the ADC12DJ5200RF helps minimise the number of serialiser/deserialiser lanes needed to output data to field-programmable gate arrays (FPGAs), enabling designers to achieve higher data rates.

High performance and stability:

• High signal detection sensitivity: The ADC12DJ5200RF has a high available dynamic performance across power-supply variations, even at minimum specifications, which improves signal intelligence by providing ultra-high receiver sensitivity to detect even the smallest and weakest signals. In addition, the device includes internal dither which improves spurious-free performance.
• High measurement accuracy: TI’s new ultra-high-speed ADC greatly minimises system errors with offset error as low as ±300 µV and zero temperature drift.
• Lowest CER: Engineers designing test and measurement equipment can achieve high measurement repeatability by taking advantage of the extremely low code error rate (CER) of the ADC12DJ5200RF, which is more than 100 times better than competing devices.

Reduce solution size and achieve lower power consumption:

• Smaller design footprint: At ten by ten millimetres, the ADC12DJ5200RF helps engineers save board space. This new ultra-high-speed ADC also requires a reduced number of lanes, which further allows for a smaller printed circuit board design.
• Low power consumption: Engineers can minimise heat dissipation and simplify overall thermal management in their designs with the ADC12DJ5200RF four watt power consumption.

The ADC12DJ5200RF is pin-compatible with the TI GSPS ADCs ADC12DJ3200, ADC12DJ2700 and ADC08DJ3200, to provide an easy upgrade path from 2.7 GSPS to 10.4 GSPS, and minimise the time and cost of redesign.

Tools and support to speed design

• Test the new ultra-high-speed ADC with the ADC12DJ5200RFEVM and TSW14J57EVM evaluation modules, available today from the TI store and authorised distributors.
• Engineers can jump-start their designs using the ADC12DJ5200RF with the ‘Multichip synchronisation reference design for clocking and power supply optimisation’.

The ADC12DJ5200RF dual- and single-channel ultra-high-speed ADC is available for sampling through the TI store. The device is in a 144-ball, ten by ten millimetre flip-chip ball grid array (FCBGA) package.