The libraries known as VarioTAP models are modularly structured as intelligent IP (Intellectual Property) and enable a complete fusion of programming and testing via the processor’s debug interfaces as well as chip-embedded instruments on a uniform platform.
The controller comes in a BGA or WLCSP package with up to 121 pins and can be adapted via the JTAG interface.
Since the controller does not support Boundary Scan, only the emulation technology VarioTAP can be run via the JTAG interface.
This means that the VarioTAP model currently offers the only option to integrate the controller into the board test.