The solution focuses on the clock stability while acquiring the signal in order to avoid sampling cadence changes.
This adverse effect on signal acquisition typically occurs when an external k-clock is used. Furthermore, the signal processing is done in real time directly on the data acquisition card, significantly reducing the processing load on the host computer.
The solution was designed using Keysight’s U5340A FPGA development kit, allowing portability of the OCT signal processing IP to other Keysight daya acquisition cards, including future releases. There is no need for internal circuitry dedicated to OCT, and the easy migration of the processing IP is a key to future OCT technology developments.