/> The new tool considers the SPEA 3030 system configuration and generates required data, workflow structures and contents of the test plan. The generation of the test pattern is implemented by an OBP driver (on-board programming), developed by the Company TAP. Response vectors of faulty test runs are converted to formats, which can be evaluated in SYSTEM CASCON™. This enables the full fault diagnostic can be executed in the Boundary Scan software.

“Now a very simple JTAG/Boundary Scan entry with the SPEA ICT is possible without additional hardware”, explains Alexander Beck, GOEPEL electronic’s expert for Boundary Scan integration into ATE systems. “Also existing projects can be checked for their Boundary Scan ability in ICT adapter systems fast and easily.”

Hinrich Tietjen, CEO of TAP, adds: This integration’s core application is clearly in the production area with Boundary Scan test contents, e.g. infrastructure test, interconnection test, cluster test, manually generated Boundary Scan test parts and Memory Access test.”
The software tool, support in generating Boundary Scan and ICT test parts as well as project transfer is provided by the Company TAP.
The high performance SCANFLEX hardware components have been successfully implemented ensuring full Boundary Scan functionality in the SPEA 3030 test systems for years.