Automatic board test made by FPGA
Thanks to their flexibility and constant performance improvements, Field Programmable Gate Arrays (FPGA) are increasingly being used in the design of modern system solutions. The latest developments with multi-core features and high-performance GBit interfaces are fuelling this trend with lasting effects. From a testing perspective, however, FPGAs offer far more possibilities than simply realising an application. For example, they can also be transformed into design-embedded test centres for validating prototypes or for tracking down the fault fiend in production testing. In order to fully exploit the potential of test strategies such as these, however, correspondingly powerful tools are necessary for continuous process automation.
Written by Thomas Wenzel and Sven Haubold, GÖPEL electronic
This article originally appeared in the March'25 magazine issue of Electronic Specifier Design – see ES's Magazine Archives for more featured publications.
Thanks to their flexibility and constant performance improvements, Field Programmable Gate Arrays (FPGA) are increasingly being used in the design of modern system solutions. The latest developments with multi-core features and high-performance GBit interfaces are fuelling this trend with lasting effects. From a testing perspective, however, FPGAs offer far more possibilities than simply realising an application. For example, they can also be transformed into design-embedded test centres for validating prototypes or for tracking down the fault fiend in production testing. In order to fully exploit the potential of test strategies such as these, however, correspondingly powerful tools are necessary for continuous process automation.
Automation makes the difference
While the use of FPGA-embedded instruments appears at first glance to be relatively trivial and straight-forward, more detailed analysis leads to a whole variety of influencing factors and fundamental decisions. The most important of these are:
- How is the FPGA-to-UUT topology detected?
- Who provides the instrument-IP?
- How is JTAG mapping performed?
- How is IP-to-pin configuration carried out?
- How is the IP control implemented?
- Who generates the test data and the guarding vectors?
- How is the overall project creation carried out?
- How is diagnosis performed?
- How much time is required for the entire project creation process?
- What FPGA design skills and tools are needed?
With purely manual implementation, both the IP and the necessary process steps are carried out by the user. This requires extensive design knowledge about the target FPGA, as well as access to the complete tool-chain. A strategy such as this can be very complex but requires minimal investment. A fully application-specific solution is ultimately produced.
Another variation is the use of preconditioned IP access solutions. In this variant, a sort of IP kit from a system provider is used. The IP includes the pure instrument function and also the JTAG mapping. Also included are predefined access routines such as read and write procedures, e.g. Based on Tcl (Test Command Language). Using such commercially available solutions shortens the project development time. They also offer the charm of relatively manageable investments, although the licence costs for an IP can be really quite high. This is associated among other things with a volume license, which is often required. However, many process steps must be carried out manually in this variant.
The third category is a complete system solution based on a framework with continuous process automation, such as ChipVORX by GÖPEL electronic represents. Here, analysers, configuration tools and generators do virtually all the work of the design engineer and test engineer. This procedure is based on the board’s CAD data and an IP library. The IP is adapted to the target without manual intervention. Automatic test generators and diagnosis processors complete the system solution. The time it takes to create the project is typically a matter of minutes and the user does not need any special FPGA tools or design experience. As a result of the integration of ChipVORX into the system platform SYSTEM CASCON (1), it is also possible to mix FPGA-embedded instruments applications with other embedded board test procedures such as boundary scan, or processor emulation, without any problems.
The joy of testing and programming
Thanks to the level of automation of FPGA-embedded instruments now available for board testing, recent years have seen a sharp increase in interest and the number of applications.
The gain in test coverage is achieved in particular due to the higher speed of the instruments. This enables problems to be solved, such as the problems experience with boundary scanning as a result of the low vector repetition rate. This is particularly relevant for flash programming due to the increasingly vast volumes of data, but also for testing of new DDR-RAM types, because certain dynamic minimum requirements must be complied with here. FPGA-embedded instruments are therefore a perfect complement to the embedded Board Test via Boundary Scan.
The situation looks a slightly different when it comes to Bit Error Rate Tests (BERT) for GBit links, which can only be performed with a nominal operating speed, or under stress conditions. A purely numeric assessment of transmission quality is inadequate here, and eye diagrams are also required. In order to support such applications, the FPGA suppliers have permanently integrated sophisticated scanning mechanisms (so-called samplers) in the silicon, directly behind the GBit receiver. In this case, the ChipVORX IPs also control these instruments, harmonised with the necessary interface parametrisation and the BERT pattern generators and analysers included in the IP. Since all the TX/Rx settings can be interactively adjusted, without new design synthesis, this also provides the design engineer with an effective means for link validation.
There are different modes for flexible flow control:
- Interactive debugging during project creation
- Interactive measured value visualisation with confirmation in run-time mode
- Standard run-time mode with numeric target/actual comparison of measured values
- Control of the overall process by parent entities (system integration)
The use of FPGA-embedded instruments with the concepts discussed above has not been discussed for a long time, however. Going beyond the principle of embedded test centres, FPGAs are also exceptionally suited for designing flexible, external test hardware. One example of this is the ChipVORX module. The concept behind it is really simple. The modules are brought to the same description level as the board to be tested using mapping and then processed with it as a single unit by the tools. All features and procedures therefore remain identical, even though it is an external additional electronics unit. Using corresponding assembly modules, standard interfaces such as PCIe, SATAe or USB3.0 can also be tested on this basis. For boundary scan purposes, all these modules also support IEEE1149. 1 and IEEE1149. 6 [5].
These modules are controlled via the normal test access port, and multiple modules of the same type or a different type can also be cascaded. A test station can be easily configured and even supports testing of objects which have no on-board FPGA. In addition, such modules can also easily be installed in fixtures and control test points contacted using needles.
The ultimate in production testing can actually only be provided by a combination of all the embedded test procedures, such as Boundary Scan, Processor Emulation Test, In-System Programming and FPGA-embedded instruments in an environment that includes external I/O modules and other external standard instruments. Appropriately engineered hardware and software platforms such as SYSTEM CASCON are essential for this. This platform naturally also supports completely manual project development based on its own IP and convenient control at language level.
Summary and conclusions
As design-embedded test centres, FPGA-embedded instruments offer huge potential for improving the quality of testing and fault coverage for highly complex electronic systems with greatly reduced physical test access.
Constant innovations in FPGA are securing the future of such approaches for embedded testing in the long term. A great deal has also been done in recent years on the side of device technology. Users can select from a diversified number of approaches to suit their own individual requirements. In particular, the almost completely automated system solutions ensure incredibly short lead times and free users from the obstacles of specific FPGA knowledge and corresponding development tools. These are very important decision-making criteria, especially for EMS service providers.
The range of applications for FPGA-embedded instruments is virtually without limit. Even for GBit links, highly sophisticated tools now exist, and the portfolio of IP products is constantly expanding. External FPGA modules also offer the option of additionally improving testability on using native methods. If all these advantages are mixed with other embedded test strategies on a single platform, nothing can stand in the way of enjoying the board test made by FPGA.