DrMOS power stages meet design challenges in POL applications
Vishay Intertechnology arrived at the electronica exhibition in Munich with a new family of VRPower integrated DrMOS power stage solutions in three PowerPAK package sizes to meet the various design challenges in high-power and high-performance multiphase POL applications. The SiC789 and the SiC788 are offered in the MLP66-40L with an Intel 4.0 DrMOS Standard (6 mm by 6 mm) footprint.
The SiC620 and the SiC620R are offered in the new 5 mm by 5 mm MLP55-31L package and the SiC521 is available in the 4.5 mm by 3.5 mm MLP4535-22L. The devices are optimised for on-board DC/DC converters in computing and storage equipment, telecom switches and routers, graphics cards, and bitcoin mining hardware with high current requirements and limited board space.
The 6 mm by 6 mm package of the SiC789 and SiC788 offers an easy upgrade path to higher output power in designs already using the Intel standard DrMOS 4.0 footprint, while the new 5 mm by 5 mm and 3.5 mm by 4.5 mm footprints are ideal for new designs where board space constraints require more compact voltage regulators. The PowerPAK MLP55-31L and MLP4535-22L also feature several design enhancements that bolster the dynamic performance of Vishay’s state-of-the art Gen IV MOSFETs by improving package parasitics and thermals.
The SiC620R in a dual side cooling MLP55-31L delivers 70 A and 95 % efficiency in typical multiphase buck converter designs. The ability to cool the device from both the top and bottom of the package results in 20 % lower losses compared to the previous-generation package while shrinking the footprint by 33 %. In notebook designs and for peripheral rails in servers, telecom switches, and gaming motherboards, the compact 3.5 mm by 4.5 mm SiC521 delivers continuous current up to 25 A and peak current to 40 A.
The VRPower family's gate driver IC is compatible with a wide range of PWM controllers and supports tri-state PWM logic of 5 V and 3.3 V. In addition, the driver IC incorporates diode emulation mode circuitry to improve light-load efficiency, while an adaptive dead time control helps to further improve efficiency at all load points. Protection features for the devices include undervoltage lockout (UVLO), shoot-through protection, and a thermal warning feature that alerts the system in case of an excessive junction temperature.