The 3-MHz (megahertz) regulators included in the ADP5022 provide fixed-voltage outputs and internal compensation, delivering exceptional efficiency and performance while minimizing the external filter size and eliminating as many as 12 discrete components from system board design. To maintain high efficiency at both light and heavy loads, the ADP5022 automatically shifts between PWM (pulse-width modulation) mode and PSM (power-save mode). The MODE pin can be used to force the device into PWM mode across all loads.
The ADP5022 provides important features that help enable the design of high efficiency noise sensitive analog and RF systems. A key to designing sensitive analog circuits is getting the regulator physically close to the load. The compact size of ADP5022 allows the system designer to place the power regulation right alongside the point of load, minimizing PCB parasitics. The buck regulators employ a low-noise driver technique, high switching speed and out of phase clocking to further reduce noise. These features, along with the integrated high PSRR LDO, provide an ideal solution to power high-performance analog and digital loads (high-speed, high-resolution data converters, for example).
ADP5022 Key Features and Benefits
* Small 2 mm × 2 mm 16-lead WLCSP package
* Dual buck regulators feature current mode architecture for excellent transient response
* Out-of-phase operation for reduced input filtering
* Low-noise driver architecture for lower high-frequency switching content
* Low, 24-μA typical quiescent current per channel, no switching
* 150 mA LDO enables auxiliary analog rail
* High PSRR (power supply rejection ratio) of 60 dB up to 10 kHz
* Low 65 μV rms output noise at VOUT3 = 3.3 V