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Broadcom Announces New StrataXGSSwitch to Lead 10 Gigabit Ethernet into Mobile Backhaul Networks

26th June 2013
ES Admin
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Broadcom Corporation announced a new high-capacity StrataXGS switch that delivers a 40 percent I/O bandwidth increase1 and integrated 10Gbps serial interfaces, in addition to more than doubling the forwarding table scale. The StrataXGS BCM56450 switch is optimized for next generation networks with an integrated traffic manager that provides fine-grained quality of service while addressing the growing scale of service-aware networks.

News Highlights:



•Supports network transition from 1 to 10Gbps Ethernet to manage increased capacity demands

•Delivers advanced carrier-grade traffic control and real-time monitoring

•Enables high density cellular networks with more than 2X increase in user capacity

•Integrated ARM-based CPU subsystem allows compact system design and low chip count



With mobile data traffic predicted to increase 12-fold by 2018 and video traffic projected to increase by 60 percent annually2, service providers require increased capacity, reliability and in-field manageability. The StrataXGS BCM56450 switch addresses these requirements with a single-chip solution, integrating high bandwidth switching with a control-plane processor, hierarchical traffic management, packet timing recovery, and advanced operation, administration and maintenance (OAM) functions.



Given the rise of mobile data traffic, carriers are focused on improving their backhaul strategy to meet end users' evolving needs while offering more services, said Ram Velaga, Broadcom Vice President and General Manager, Core Switch. Today's introduction builds on our established StrataXGS leadership and longstanding innovations in carrier Ethernet to equip carriers with a high-performing foundation that supports their rapidly evolving mobile backhaul needs.



Key Features



•Advanced OAM functions and hardware-based protection switching enable a highly reliable backhaul network



•Fully integrated timing solution with integrated digital phase-locked loop and 1588 v2 and synchronous Ethernet hardware support provides highly accurate time synchronization



•Carrier Ethernet packet processor delivers line-rate L2 and VLAN switching, L3 routing, MPLS, MPLS-TP, and provider backbone bridging (PBB) while supporting L2, L3, MPLS, or PBB deployment models



•Channelization over Ethernet and hierarchical traffic manager with DDR3-based packet buffer memory provides fine grained quality of service (QoS) to aggregate sub-1G microwave and small cell backhaul networks



•On-chip ARM-based CPU and integrated 10G optical PHYs reduce bill-of-materials cost and enable a compact system design

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