High-voltage latch-up prevention guaranteed

Achieving an industry best 8-kV HBM (human body model) ESD rating, the trench isolation between the N-channel and P-channel transistors of each CMOS switch provides guaranteed latch-up immunity under all conditions. Both these features help shield equipment from excess current and eliminate the need for designers to install additional protection circuitry. The new switches also have low Ron flatness and performance which minimises temperature variation and feedback resistance and optimises gain switching.