Silicon Labs - 1-200 MHz CMOS Clock Generator
Silicon Laboratories has introduced the expansion of its Any-Rate Clock Generator family with the Si5355/56. The Si535x devices are made to order, 8-output CMOS clock generators capable of synthesizing four unique, non-integer related frequencies from 1-200 MHz. The Si535x clock generators provide guaranteed 0 ppm frequency synthesis error for any combination of frequencies, enabling the replacement of multiple clock ICs and crystal oscillators with a single device. Through a flexible web configuration utility called ClockBuilder, factory-customized pin-controlled Si5355 devices are available in less than two weeks, enabling faster time to market while reducing the bill of materials in cost-sensitive networking, data communication, telecom access, computing and general purpose applications.Mode
3 PLL and 4 PLL I2C programmable clock generators cannot guarantee
0 ppm frequency synthesis error for all combinations of output frequencies. In addition, the jitter performance of multi-PLL solutions varies significantly with device frequency configuration, increasing the risk that designs violate system-level jitter requirements. As a result, hardware designers often rely on crystal oscillators (XO) for clock generation in many applications to reduce risk.
The Si5355 leverages a single PLL architecture and Silicon Labs' proven MultiSynth fractional divider technology to provide greater frequency flexibility and lower jitter than 3 PLL or 4 PLL clock generators. Since the Si5355 can synthesize all frequencies with 0 ppm error, it can replace multiple clock ICs and crystal oscillators with a single IC. The Si5355 has consistently low jitter (50 ps pk-pk period jitter) regardless of frequency configuration, providing significant margin to system-level jitter requirements.
To further simplify design, the Si5355 can generate any combination of output frequencies from a standard, low cost 25 or 27 MHz crystal. If the device frequency plan changes, the same crystal can be reused, eliminating the higher cost associated with custom frequency crystals required by some traditional solutions. Alternatively, the Si5355 supports a 5-200 MHz reference clock input, enabling the device to be used in synchronous applications. Given the Si5355's frequency flexibility and jitter performance, BOM cost and complexity can be significantly reduced.
The Si5355 is the industry's first clock generator that can be completely customized and ordered directly online, simplifying product selection, device configuration and procurement. Silicon Labs' ClockBuilder(TM) web-based utility provides turnkey, application-specific clocks, eliminating the need for field programming hardware and software. Further, since the Si5355 does not require metal mask changes to customize clock frequencies like traditional clocks ICs, Silicon Labs can reduce the lead time associated with custom clocks from six weeks to less than two weeks.
Silicon Labs' approach enables customers to use the simple ClockBuilder web utility to create custom clocks, revolutionizing the timing IC industry by enabling a broader range of customers to use clocks custom-tailored for their applications, said Dave Bresemann, vice president of Silicon Laboratories. Frequency flexibility, programmability and mixed-signal innovation gives customers new options for clock generation that will prevent their timing subsystem from creating delays in their product development cycles.
The Si535x family includes the Si5356, an I2C-programmable Any-Rate 1-200 MHz spread spectrum clock generator. Spread spectrum is available on any clock output with any frequency and any spread amount, providing a level of design flexibility not available from traditional solutions restricted to providing spread spectrum on only one or two frequencies. If system-level electro-magnetic interference (EMI) testing confirms that spread spectrum is required by an application, spread spectrum can simply be enabled by pin selection without the need for component or firmware changes, further simplifying qualification testing and shortening the overall development cycle.
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