Home Products Mixed Signal/Analog Fifth generation high performance 65nm FPGA offers 35% dynamic power reduction

Fifth generation high performance 65nm FPGA offers 35% dynamic power reduction

Xilinx’s latest high performance field programmable gate array (FPGA) Virtex-5 LX, is now available from DT Electronics. Built on Xilinx’s ExpressFabric architecture, the V5LX allows designs to be packed in 45% less area, operate with up to 30% performance improvement and 35% dynamic power reduction. Each platform within the Virtex-5 family has been optimised to offer a balance of high-performance logic, serial connectivity, signal and embedded processing to suit difference applications. The Virtex-5LX platform, aimed at high-performance general logic applications, is available in six device configurations and features 550 MHz clocking technology with performance-tuned IP blocks.

Mixed Signal/Analog

12 December 2006

byNews Desk

Xilinx’s triple oxide process technology, introduced in the Virtex-4 family, provides the basis of reducing static power caused by leakage whilst the 65 nano metre (nm) process assists in reducing dynamic power. Reducing both the static and dynamic power of an FPGA device brings several benefits. Firstly, lower supply requirements need less components and consume less board space. Secondly, since power consumption is directly related to heat dissipation, simpler and less expensive thermal management solutions are required. Lower operating temperatures help to improve system reliability with a 10 degree C reduction resulting in a twofold increase in component life.

DT Electronics has scheduled two seminars to help design engineers evaluate the Virtex-5 family of FPGAs during January. The seminars take place on the 23rd January in Reading, UK and the 24th January in Southampton. Engineers will learn about the new features of the Virtex-5 family and how to implement them.

For further information on the seminars or to register visit ://www.nuhorizons.com/xpresstrack/virtex5/index-uk.asp