Addressing nanometre-scale SoC mixed-signal verification challenges

Offering an intuitive use model and complete reusability of existing verification infrastructure, Symphony delivers up to five times productivity improvements in mixed-signal verification over traditional flows.

Systems on Chips (SoCs) used in high-performance computing, Internet of Things (IoT) and automotive applications have multiple high-performance, low-noise mixed-signal interfaces. A versatile mixed-signal verification platform is needed to help designers verify connectivity, functionality and performance across mixed-signal circuitry on the chip, which in turn drives a very large number of mixed-signal simulations at the block and top levels.

Mixed-signal simulation solutions must be fast, accurate, easy to use and seamlessly integrated into existing analog and digital verification flows to meet time-to-market requirements.

Underscoring Siemens’ continued commitment to invest for EDA leadership, Mentor’s Symphony Platform is built from the ground up to solve these complex mixed-signal verification challenges. Symphony’s modular architecture leverages Mentor’s AFS circuit simulator to provide exceptionally fast mixed-signal simulation performance with nanometre-scale SPICE accuracy and compatibility with all leading digital solvers, including Mentor’s Questa functional verification tool family.

“IDT is standardising on Symphony because our timing products require high accuracy verification for high-speed phase-locked loops that combine digital calibration blocks with analog functionality,” said Brian Buell, design director at IDT. “Using Mentor’s Symphony Mixed-Signal Platform, we are able to efficiently run several test benches to validate the digital calibration of our phase-locked loops with three times performance improvement over our previous solution. Symphony has significantly improved our verification productivity through its intuitive setup, use model and excellent debugging capabilities.”

Symphony allows users to remain in their existing use model and maximise reuse of their existing verification infrastructure, including test benches, encrypted IP blocks, and digital/analog netlists. Symphony’s accuracy, performance and intuitive use model, coupled with powerful debugging capabilities and extensive boundary element and configuration support, enable a broad range of verification capabilities including connectivity and functionality checks, as well as mixed-signal IP characterisation across A/D subsystems.

Rémi Le Révérend, Design Director for Sensing Solutions group at Semtech, a leading IC provider for touch and proximity sensing applications, stated: “To ensure first-time, full-specification compliance of our touch and proximity sensor ICs, we need to run full-chip simulations with high accuracy. Running these simulations at transistor level is prohibitively slow with unacceptable turnaround times in the range of several days. 

“Using Mentor’s Symphony Mixed-Signal Platform, we were able to complete these simulations in a few hours with the same results as the full transistor-level simulations. Symphony’s simple use model and the ability to plug seamlessly into our verification flow boosted our productivity significantly. We will continue to address our verification challenges with Symphony.”

Ravi Subramanian, General Manager and Vice President of Mentor’s IC Verification Solutions, stated: “Our customers require significant productivity improvements to their existing mixed-signal verification flows. With Symphony, we are proud to deliver another key capability for our analog/mixed-signal verification portfolio that enables our customers to access high-performance nanometre-scale, SPICE-accurate mixed-signal verification capabilities in a simple and compelling use-model that will enable them to deliver superior products to market significantly faster.”