The LTC2217 can interface to a variety of digital systems with multiple digital output modes standard LVDS, low power LVDS, straight CMOS and demultiplexed CMOS. Additionally, an easy to use digital output randomizer is available which can dramatically reduce the effects of digital feedback from the digital outputs to the analog inputs. A separate output power supply allows the CMOS output swing to be as low as 0.5V for further noise enhancement. The LTC2217 also features an optional internal dither circuit for improved SFDR performance for low-level input signals. Both features, only offered in Linear Technology ADCs, enhance the LTC2217’s overall distortion performance in high sensitivity receiver applications.
The LTC2217 is pin-compatible with the existing 16-bit, 130Msps LTC2208 and 160Msps LTC2209 ADCs. In addition, the 16-bit 80Msps LTC2216, and 65Msps LTC2215 are also available. These low-noise 16-bit ADCs are well suited for communications applications, ATE, as well as high-end medical imaging equipment.
In addition to the new low-noise ADCs introduced today, Linear Technology currently offers a 16-bit, high performance ADC family sampling from 10Msps to 105Msps with CMOS outputs in a 7mm x 7mm QFN package. Linear’s entire high-speed ADC portfolio features industry-leading AC performance, extremely low power consumption and pin-compatibility, providing easy migration from 10-bit to 12- or 14-bits, at various sample rates. All these ADCs can sample as low as 1Msps and as high as the specified maximum sampling rate. The system footprint of the whole ADC family is exceptionally small, compared to competitive products since fewer external bypass capacitors are needed.