Micros

Speeding verification of MIPS-based designs

3rd March 2016
Joe Bush
0

A collaboration to aid customers speed time to market has been launched by Imagination Technologies and Mentor Graphics Corp. The Mentor Veloce emulation platform, specifically the Codelink offering, now supports debug of designs built with Imagination’s full range of entry level to highest performance MIPS CPUs including the latest deeply embedded M-class M6250 processor based on the MIPS R6 architecture. Mentor is using MIPS CPUs in its training programmes and Codelink demonstrations around the globe.

The Codelink tool enables a fast software debug experience on a design with the Veloce platform. It presents the important information needed to debug challenging hardware/software integration problems. With Codelink, software developers can optimise for performance and power consumption of the complete system – including hardware and software – before committing to silicon. During emulation, Codelink records and stores all of the software execution details from the MIPS processors for later ‘playback,’ with features such as fast forward, rewind, pause, single step and the equivalent of zoom and pan. Codelink gives the software developer a familiar software debug experience, but with much greater debug capabilities.

Eric Selosse, Vice President and General Manager of the Mentor Emulation Division, commented: “As the complexity of SoC designs continues to grow, emulation is becoming a ‘must have’ capability to fully debug highly integrated SOCs. With Codelink, we are moving the debug task offline, marking an important methodology shift for software verification – and increasing the value of the Veloce platform for automotive applications such as advanced driver assistance systems (ADAS). With its advanced MIPS CPUs and other IP solutions for multi-media, connectivity and more, Imagination is a key partner for Mentor. We are collaborating in a number of areas to help mutual customers get products to market in much shorter time with less risk.”

Jim Nicholas, Vice President, MIPS Business Operations, Imagination, added: “As we enter 2016, we are accelerating our MIPS IP core roadmap and product delivery, and continuing to expand the already robust ecosystem of tools and software for MIPS. This collaboration with Mentor is a great example of how we are making it easier than ever to use MIPS. A number of key MIPS customers are using Mentor’s Veloce emulation for hardware emulation. These customers can now leverage Codelink to complete designs months sooner compared to traditional methods by moving critical software tasks to the pre-silicon stage. We believe that the results of our emulation collaboration will bring significant benefit to our customers.”

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