Micros

SDIO and CE-ATA Connectivity Solutions for Marvell's newest-generation PXA3xx processor family

30th November 2006
ES Admin
0
QuickLogic Europe announces the availability of ultra-low power connectivity solutions between SDIO and CE-ATA-based peripherals and Marvell's newest-generation PXA3xx processor family. The solutions have been system-proven through a QuickLogic daughter board connecting to a PXA3xx-based evaluation board from Sophia Systems.
The QuickLogic solutions are based on PolarPro FPGA technology, and integrate high performance host controllers for the Marvell PXA3xx embedded microprocessors, and SDIO and/or CE-ATA peripherals, and/or any SD memories.

The inherent benefits of PolarPro FPGAs include fast design times, design flexibility, increased battery life, reduced board space and a high rate of successful first-time designs. These attributes are critical for components designed into the high-performance, low-power target applications for the PXA3xx processors such as smart phones and portable game/media players.

We are delighted to collaborate with Marvell and deliver peripheral connectivity solutions in conjunction with the new processor announcement said Brian Faith, QuickLogic's Senior Director of Marketing. This gives our mutual customers a competitive edge when introducing new products since they can now avoid the lengthy design times needed for implementing such critical functions in media rich handheld mobile products.

Today's announcement highlights QuickLogic's commitment to continuously deliver solutions for Marvell's application processors, said Marvell's Gary Forni, Director of the Platform Enabling, Cellular and Handheld Business Unit, Communications and Consumer Business Group. We are delighted to have QuickLogic solutions help us extend our reach to standard peripherals such as HDD, Wi-Fi, SD Card, and Mobile TV for the PXA3xx family of application processors. QuickLogic provides hardware-proven solutions allowing customers to quickly define and develop high-quality products without spending significant time verifying peripheral interfaces.

The PolarPro FPGAs features include a Very Low Power (VLP) mode in which the device draws less than 5 microamps of standby current, a level never before seen for FPGAs of this density. The VLP mode also retains the state of the device, including IOs, which greatly simplifies system design. The PolarPro family of devices includes a highly flexible embedded RAM block with built in FIFO controller logic, which enables fast guaranteed performance and cost effective implementations.

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