RTOS, stacks, middleware for RISC-V architecture
A new embOS port for the Open Source RISC-V CPU architecture has been announced by SEGGER. In addition to embOS, SEGGER offers emWin to construct user interfaces, emSSL, emSSH and emSecure to secure internet communications, cryprographic and security libraries for encryption, code signing and authentication (digital signatures), embOS/IP, emModbus, emUSB-Host and emUSB-Device communication stacks for Internet and industrial applications, and emLoad to enable firmware updates from portable storage or delivered over the air.
The efficiency of embOS complements the high-performance and very low power consumption characteristics of RISC-V MCUs.
The embOS port comes with a board support package for the Digilent Artix-A7 ARTY evaluation board providing a straightforward getting-started experience with SEGGER software on RISC-V. Packages simply work, out of the box, without additional configuration or setup, and a ready-to-run project is included for Embedded Studio.
The embOS for RISC-V offering includes the highly respected embOS manual, which is both the definitive reference to the embOS API and a solid, yet accessible, tutorial for engineers unfamiliar with embedded RTOS concepts.
embOS is fully compliant with the MISRA-C:2012 standard and this makes it suitable for demanding automotive and high-integrity applications.
“With the introduction of embOS, their stacks and middleware supporting the RISC-V ISA, SEGGER demonstrates their expertise in creating highly-efficient software. With the embOS release, RISC-V users can benefit from low memory footprints which allows more room for the actual application," said Rick O’Connor, Executive Director of the non-profit RISC-V Foundation.
”RISC-V is a very promising CPU architecture. By adding our software to the RISC-V ecosystem we provide an end-to-end comprehensive solution from a single supplier for firmware and application developers using RISC-V devices,” added Til Stork embOS Product Manager at SEGGER.