Evatronix Introduces an Ultra-fast Intel 80C251 Compatible Microcontroller IP Core
The silicon intellectual property (IP) provider, Evatronix SA, today announced the R80251XC – the high performance 32-bit Intel 80C251 compatible microcontroller. It is the ultimate 8051 compatible IP core, with performance results that exceed these of the original Intel 8051 chip by more than 24 times, which translates to over 3 times better result than the Intel 80C251 at the same clock frequency.The
The eXtreme Configurability (XC) feature of the R80251XC enables SoC designers to optimize the IP core for their specific application by choosing a custom or predefined set of dedicated 80251 peripherals, which include multiple UARTs, I2C interfaces, Timers, and Serial Ports as well as single SPI, Watchdog, Software Reset and Real Time Clock modules.
Depending on the desired level of performance customers may choose between two 80251 CPU versions – the standard Intel 80C251 timing compatible version and the accelerated implementation with internal instruction execution timings reduced 4 times, and thus being 4 times faster than its counterpart.
There were two equally important factors behind the decision to introduce the R80251XC to the market: the ability to offer an upgrade to over 150 customers for our 8051 IP and meeting the demand for flexible, high performance 32-bit architecture, said Carsten Elgert, VP Marketing and Sales at Evatronix. “ The R80251XC builds upon our extensive experience in the 8051 architecture and adds the 32-bit performance benefits, thus presenting a mature, yet ultra-high performance solution for majority of applications.”
For efficient application development, the 80251XC is supported by the Evatronix Application-debugging Support Environment for 8051 series microcontrollers (EASE-8051). The solution comprises of the On Chip Debug Support module implemented inside the R80251XC, the KEIL™ µVision4 IDE compatible software interface for the PC and a hardware Evatronix Debug Pod that transmits data between the debugger and the debug target.
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