Atmel micro offers 80 MIPS performance at 40mA from new AVR32 UC core

19th June 2007
ES Admin
Nu Horizons announces availability of the AVR32 UC3A, the first microcontroller based on Atmel’s new AVR32 UC core. Delivering 80 Dhrystone MIPS performance while consuming just 40mA from a 3.3V supply at 66MHz clock speed, the devices feature up to 512KB Flash and 64KB RAM, an Ethernet MAC, a USB OTG controller and External Bus Interface (EBI), all of which minimise external component count. The EBI enables easy interfacing to external SRAM and SDRAM. The large SRAM allows implementation of buffered algorithms for communications protocol management and typical applications include industrial automation, building control systems, medial instrumentation, test and measurement, communications systems, and point-of-sale equipment.
Up to 264Mbytes/s of internal data bandwidth permits high data bus throughput and an optimised 3-stage pipeline deliver high computational throughput. The tightly coupled, on-chip SRAM gives single clock access from the pipeline and high speed interrupt servicing simplified real-time event programming. Most instruction, data access and instruction-fetch commands are carried out within a single clock cycle. The rich instruction set of 220 instructions, and a mixed 16-bit and 32-bit instruction set architecture, facilitate high code density and minimise memory requirements.

Tool support includes from Atmel includes the AVR32 GNU tool chain, IwIP TCP/IP protocol stack and the AVR32 Studio – a multiplatform integrated development environment. A suitable C Compiler is the Embedded Workbench from IAR Systems.

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