Soft errors caused by background radiation can corrupt memory content, resulting in a loss of critical data. A hardware ECC block in Cypress’s synchronous SRAMs performs all error correction functions inline, without user intervention, delivering outstanding soft error rate performance. The synchronous SRAMs with ECC are pin-compatible with current synchronous SRAMs, enabling customers to enhance SER and system reliability while retaining board layout. Additionally, the SRAMs help reduce power consumption by as much as 36% over competing solutions.
The 36Mb synchronous SRAMs are currently available in industrial temperature grade in RoHS-compliant 100-pin TQFP and 165-ball BGA packages.