Lattice and Etron deliver low power reference design for Edge AI

A low power ECP5 FPGA from Lattice provides processing for the AI or smart vision workload and serves as the memory controller for Etron’s high performance RPC DRAM.

The reference design reduces power consumption, overall design size, and data latency by allowing developers to store data used in AI and smart vision applications locally instead of using larger, external memory cards.

Smart vision and other AI applications generate a lot of data that is typically uploaded to the cloud for analysis. Concerns with data latency and privacy have Edge device OEMs looking to handle more analysis locally, but without adding additional power or size requirements to their design.

As implemented on the reference design’s PCB, the Lattice/Etron solution uses 15% less power than a system using standard DDR3 DRAM, yet has an overall design footprint smaller than the 9x13mm BGA package used by a standard DDR3 DRAM chip.

“This collaboration between our two companies - leaders in low power, small form factor FPGAs and DRAM memory technologies - has broad implications for the ongoing development of Edge AI devices,” said Kambiz Khalilian, Director of Strategic Alliances, Lattice Semiconductor.

“Not only does the reference design enable form factor and processing capabilities specifically tailored for implementation on Edge devices, it does so without requiring expertise in FPGA-based design thanks to our user-friendly design tools and our powerful sensAI software stack.”

“Our work with Lattice makes it possible for customers to develop devices with the low power computational resources needed to deliver ‘always-on’ intelligence at the Edge,” said Chung W. Lam, President of Etron Technology America.

“Developers serving markets like industrial, automotive, and consumer are racing to differentiate their products by adding intelligence to them, so access to easy-to-use reference designs like this will be invaluable to their efforts.”

The reference design includes software development tools, featuring a GUI-based memory code generator tool and a Verilog simulation model. Application demonstrations featuring the Lattice sensAI solutions stack and the RPC DRAM memory controller reference design will be available from Etron in the third quarter of this year.