Serving On Demand

24th June 2013
ES Admin
As we demand more mobility and instant access, we need bigger, faster, and more efficient data centers to serve up the content. Can non-volatile memory successfully extend its position as the technology of choice in mobile devices, to high performance computing? Find out as we explore more in this article from ES Design magazine.
In the next five years scalability and chip density will spark many new applications and innovations across the computing world, from mobile technology to high-performance computing. Nonvolatile memory (NVM) has become an important and essential IP that adds flexibility to products and helps accelerate time to market.

NVM is expected to see phenomenal growth in the next five years, with the global market soaring to $1.6B by 2015 according to MarketResearch. Flash will continue to be a central technology in all areas, from consumer to the enterprise, as it revolutionises how we store data. It is the solution of choice for truly reliable portability in today’s popular smartphones and tablets, and it is gaining momentum as the ‘performance operator’ in the data center — two applications that are undeniably linked.

At the beginning of the mobile market evolution, NOR Flash memory was the dominant technology. NOR Flash is still a viable and cost-efficient solution for low-cost handsets and lower-end feature phones. Serial NOR solutions from Micron in densities from 64 to 128Mb are still used in volume for ultra-low cost handsets.

In entry-level feature phones, NOR Flash memory may be complemented by pseudo-static RAM (PSRAM) or LPDRAM volatile memory, offering the low power consumption, high performance, choice of densities, and wide temperature ranges needed for this type of application. MCP memory subsystems for entry-level feature phones are available from Micron, with up to 512Mb parallel NOR coupled with 128 to 256Mb low-power double data rate (LPDDR) SDRAM.

The smartphone revolution is requiring more memory space for both volatile and nonvolatile storage. Higher-performance feature phones require a different type of nonvolatile memory: NAND Flash. NAND Flash memory was developed for high-density data storage, trading off random access capability in order to achieve a smaller cell size, which translates into a smaller chip size and lower cost per bit. Higher-density LPDDR memory is needed. Multichip package memory subsystems for lower-end smartphones are available from Micron with 2 to 8Gb of parallel SLC NAND memory and 1 to 2Gb LPDDR2.

As NAND Flash geometries shrink, raw NAND is becoming more challenging to manage. Managed NAND Flash memory subsystems were conceived in order to cope with this increased level of complexity. Micron provides a wide range of high-performance e•MMC devices, in different densities, with an integrated 32-bit NAND controller that offers more robust management and memory optimisation compared to discrete NAND devices. Micron also offers different combinations of e•MMC modules with associated LPDRAM for mobile systems. MCP solutions with 4GB e•MMC and 4Gb LPDDR and LPDDR2 are used for low-range smartphones. More advanced mobile systems can use MCP solutions with a combination of 4 to 8GB e•MMC modules associated with 4 to 8Gb LPDDR2. Top-level, very high-performance ‘flagship’ smartphones may be equipped with stand-alone 16 to 64GB e•MMC associated with 4Gbit to 2GB LPDDR3.

High-Performance Computing

With the adoption of STT MRAM, NVM DIMM, and PCM cache memory mixed with soon-to-be-introduced technologies like the Hybrid Memory Cube (HMC), enterprise storage will be the largest NVM market. NVM will greatly improve the input/output performance of enterprise storage systems as requirements intensify with the growing need for web-based data supported by cloud servers.

System designers today are looking at new memory system designs to support increased demands for bandwidth density, and power efficiency. HMC has been recognised by industry leaders and influencers as the long-awaited answer to the growing gap between the performance improvement rate of DRAM versus processor data consumption rate — a dilemma known as the ‘memory wall’. HMC uses advanced through-silicon vias (TSVs) — vertical conduits that electrically connect a stack of individual chips — to combine high-performance logic with Micron’s state-of-the-art DRAM chips. HMC delivers bandwidth and efficiencies a leap beyond current device capabilities, blasting data 15 times faster than a DDR3 module and using 70% less energy and 90% less space than existing technologies. Micron expects to ship the first engineering samples of HMC later this year.

Micron/Agigatech NVDIMM modules are being used in applications such as storage tiering, write-cache for RAID systems, full system persistence, data logging, de-duplication and fast access to metadata. Current offerings include a 4GB and 8GB version, with a 16GB version planned for later this year. In normal system operation, the NVDIMM operates like a typical RDIMM with the associated RDIMM performance. Employing NVDIMMs in a storage hierarchy achieves significant performance over an SSD-only implementation.

NVDIMMs include both DRAM and NAND on the module, along with a controller to move the data between the DRAM and NAND when directed by the system. A Supercap module is tethered to the NVDIMM, which supplies the required power to perform the DRAM to NAND data movement in case of a system power loss.


Many car buyers today care more about the infotainment technologies embedded in the dashboard than what’s under the hood. Users want to be connected and have convenient access to their personal content anywhere, anytime, on all of their devices. Their vehicles become just another node in the network, an extension of the user’s digital and social lifestyle. A ‘connected’ car is safer, more comfortable and more energy-efficient, equipped with early access to important information such as weather reports, traffic jams, or accidents.

Electronic content in cars has been steadily increasing since the first digital engine control modules were introduced in the 1980s. This trend will accelerate as advances in semiconductor technology continue to drive down the cost of various electronic modules and subsystems. With 60% of new cars expected to be connected by 2017, this megatrend is driving explosive growth in both volatile and nonvolatile memory. New memory solutions, specifically tailored for automotive infotainment systems, are needed to provide additional storage space for rich multimedia data and advanced software and applications.

As the innovation cycle becomes shorter, designers need drop-in memory solutions that are not only easy to implement, but also can meet the rigorous automotive-grade certifications for temperature and reliability. The embedded multimedia card (e•MMC) device is an interesting option—it has all the features needed to support navigation and infotainment applications, such as detailed 3D maps, traffic monitoring, meteorological information, car radio and multimedia, e-call, and voice recognition. As a standardised version of the managed NAND memory architecture, it is essentially a module based on a bank of nonvolatile NAND Flash devices, internally managed by an ad-hoc microcontroller. The primary advantage to the user is that an e•MMC device is fully managed and independent from the NAND technology inside. e•MMC memory is backward-compatible and has a standard interface so that system developers don’t have to bother with dedicated software to manage the complexity of the NAND Flash.

The change in Moore’s Law demonstrates that performance doesn’t come ‘for free’, and continual innovation and creation of new architectures is required to address today’s big data challenges and improve end-user application performance.

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