Analysis of China’s 3D Layer NAND Flash

“This 64L 3D NAND flash device represents the first major competitive semiconductor product to come out of China’s state-backed investment in cutting-edge memory chips,” said Gavin Carter, CEO of TechInsights. “There is no question that this will disrupt the ~52 billion-dollar NAND memory market and its respective market leaders Samsung, Kioxia, Western Digital, Micron, Intel, and SK hynix.”

YMTC’s 64L 3D NAND device is a disruptor not only because it is offered by a significant new entrant, but because of its Xtacking architecture.

Xtacking architecture offers higher array efficiency and memory bit density than conventional 3D NAND solutions, such as Samsung’s 64L V-NAND and KIOXIA/Western Digital’s 64L BiCS NAND. Additionally, YMTC Xtacking uses Wafer-to-Wafer hybrid bonding technology, so the NAND array is upside-down on periphery circuits.

TechInsights has considerable analysis underway for this part, including:

• Floorplan – Top metal and polysilicon planar die image, SEM X-section, process proof, floorplan analysis and die utilization including block sizes and functionality, die and package cost.
• Peripheral design - Plan view SEM image set with hierarchical schematics of target blocks.
• Structural and materials - SEM planar and X-sections, TEM EDS and EELS, SCM, SIMS and other advanced techniques of structural and material analysis.
• Process flow - Process flow steps and 3D emulations of advanced semiconductor technologies.
• Circuit reverse engineering- Hierarchical schematics demonstrate the design from the block down to gate level - all linked to the original layout, showing the extracted gates and associated interconnects.