It maintains high RF performance and low power consumption over the entire frequency band and is offered in a 12-lead 3×3 mm QFN package. The attenuator does not require external blocking capacitors if 0 VDC is present on the RF ports.
It is designed for use in 3G/4G wireless infrastructure and other high performance RF applications.
It is manufactured on Peregrine’s UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS.
According to Peregrine, additional key features of the PE43205 include:
- Low attenuation Error:
- 0.10 dB @ 2 GHz
- 0.15 dB @ 3 GHz
- High linearity: +61 dBm IIP3 @ 1950 MHz
- Wide supply range of 2.3V to 5.5V
- 1.8V control logic compatible
- 105°C operating temperature
- ESD performance:
- 2kV HBM on all pins
- 100V MM on all pins
- 1 kV CDM on all pins