FPGAs

Smoothing the path to 50 and 100GbE

5th May 2016
Joe Bush
0

The recent FCCM 2016 Symposium held in Washington, saw Bittware and Atomic Rules introduce a UDP Offload Engine (UOE) IP core. A live demo running on BittWare’s XUSP3S PCIe board, showcased the UOE IP core operating at 25GbE with no packet loss.

Atomic Rules UOE IP core operates at 10/25GbE and is upgradable to 50/100GbE for recent Xilinx and Altera-based BittWare platforms. The UOE IP core optimises throughput for all line rates, with no packet loss even for very small packets. It also offers support for Super Jumbo Frames and robust multi-cast capabilities. The combination of BittWare capabilities and UOE provides clients with a set of capabilities in hardware that leverage the RFC 768 standard, including simultaneous transmit/receive, checksum and segmentation.

The UOE IP core enables application level UDP datagrams to be concurrently sent and received on a LAN or across a network. An integral IGMPv2 multi-cast pre-selector removes unwanted traffic, and L4 UDP multi-casts are pre-selected so that user applications don't have to perform this function. The UOE IP core is tested for operation with popular FPGA vendors’ 10GbE and 25GbE MACs.

“We’re pleased to be able to work with Atomic Rules to add this innovative application IP to our already well established FPGA platforms,” said Ron Huizen, Vice President of Systems & Solutions at BittWare. “Their ability to run 25GbE today with an easy upgrade path to 100GbE is a real benefit for our customers.”

“Developers have their eye on 50 and 100GbE,” said Shepard Siegel, CTO of Atomic Rules. “They want to start now with 10 and 25GbE but also to make sure their effort is sustainable. Our UDP Offload Engine gives them the best of both worlds, providing them maximum throughput now with existing hardware and a straightforward upgrade as network speeds increase.”

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