Lattice - Production Release of Highest Density LatticeECP3 FPGA

17th November 2009
Staff Reporter

Lattice Semiconductor today announced that the LatticeECP3-150 FPGA, the highest-density device in its award-winning high-value, low-power ECP3 mid-range FPGA family, has been fully qualified and released to volume production.

The ECP3-150 device features a DSP capacity of 320 18x18 multipliers, 6.8 Mbits of memory and up to sixteen 3.2Gbps SERDES channels, making it ideally suited for highly complex and integrated Wireless Remote Radio Heads (RRH) such as MIMO-based RF antenna solutions. The ECP3-150 FPGA also provides Wireline Access developers with unprecedented high-density, low-cost, low-power Ethernet, SONET and PCI Express solutions, with the lowest cost points and power footprints in the FPGA industry. With the production release of our ECP3-150 device, our customers can implement even more complex designs for wireless and wireline access and still benefit from the device's low power and economy, said Shakeel Peera, Lattice Marketing Director for SRAM FPGAs.

A range of intellectual property (IP) cores, including Crest Factor Reduction (CFR), Digital Pre-Distortion (DPD), CPRI, OBSAI, Serial RapidIO, XAUI, SGMII/Gigabit Ethernet, PCI Express, SMPTE for serial connectivity, FIR filters, FFT, Reed-Solomon encoders/decoders, CORDIC, CIC, NCO for DSP functions and several others for memory interfaces and connectivity, are available from Lattice and its partners to enable customers to develop time-to-market solutions.

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