FPGAs offer a 35% increase in LUTs & 15% more I/Os

19th April 2016
Nat Bowers

Expanding its MachXO3 family of FPGAs, Lattice Semiconductor has announced the MachXO3L-9400 and MachXO3LF-9400 devices available in multiple packages. Built in response to customer demand, these devices bring expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low cost video bridging in large monitor applications.

The new enhanced features of the MachXO3 family make it suited for implementing control path functions:

  • Glue-less 1V I/O interface for out-of-band communication with new, leading-edge processors;
  • Hitless I/O enables in-system hardware upgrade along with a switch over from its old configuration to the newly programmed configuration without interrupting the circuit board operation – a feature that is mandatory in high volume systems;
  • Password protection makes the system more robust against malicious erase commands;
  • SED/SEC/SEI feature enables recovery from a soft error event in milliseconds;
  • Addition of analogue I/Os is simple and enables integration of all hardware management while reducing overall cost; and
  • Fast 900Mb/s operating speeds supported by MachXO3-9400 FPGA’s I/Os ensures that even high-resolution video streams operate smoothly.

Shyam Chandra, Senior Product Marketing Manager, Lattice Semiconductor, commented: “Our award-winning MachXO3 FPGA portfolio is suited for control PLD and bridging, offering the smallest, lowest cost and instant-on programmable platform to enable the integration of critical functions demanded by today’s advanced processors and SoCs. We continue to enhance our MachXO3 family to deliver customisable solutions that meet our customers’ next-gen product requirements.”

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