Design

Verification suite enabled on Arm-Based HPC datacenters

19th October 2018
Alex Lynn

It has been announced by Cadence Design Systems, that the Cadence Verification Suite is now enabled for Arm-based high-performance computing (HPC) server environments. Through an industry ecosystem collaboration, software tools in the suite, include Xcelium Parallel Logic Simulation, and run on the Hewlett Packard Enterprise (HPE) Apollo 70 System.

The HPE Apollo 70 System is built using the Marvell ThunderX2 processor based on the Armv8-A architecture. The collaboration provides customers with a compute option that HPE indicates can be up to 19% more cost effective than other HPE industry-standard servers, enabling a new level of flexibility to make tradeoff decisions pertaining to internal project priorities, user license allocation, unlicensed task execution and time to project completion.

As part of the Cadence System Design Enablement strategy, the Cadence Verification Suite technologies supports execution of verification tasks on the HPE Apollo 70 System including high-throughput regressions and scalable multi-core utilisation for long-runtime simulations.

The Cadence Verification Suite for Arm-based servers now includes the Xcelium Parallel Logic Simulation Platform, JasperGold Formal Verification Platform, vManager Metric-Driven Signoff Platform, Indago Debug Platform and the Verification IP catalogue. These products are licensed using Flexera’s software monetisation platform through a collaboration that enabled it for Arm-based servers.

By deploying Apollo HPE 70 Systems with the Cadence Verification Suite, customers across various industries such as mobile, artificial intelligence (AI), automotive, aerospace and defence, industrial and IoT sensor markets can further optimise semiconductor verification.

Paul Cunningham, Corporate Vice President and General Manager of the System & Verification Group at Cadence, stated: “Chip designers are faced with intense verification pressures such as shorter product design cycles, increasing complexity, added quality requirements and continuous cost reduction. These challenges are driving continuous datacenter innovation, and together with HPE, Marvell and Arm, we are enabling our customers to choose from an expanded portfolio of high-capacity datacenters when using our verification solutions.”

Drew Henry, Senior Vice President and General Manager, Infrastructure Business Unit, Arm, added: “We are using Cadence Xcelium Parallel Logic Simulation on Arm-based production servers, and the additional support from Cadence Verification Suite technologies not only reduces development costs but enables the deployment of additional resources needed for more complete verification. The deployment of the Cadence EDA tools on the HPE Apollo 70 System is another step forward in the continued adoption of the Arm architecture across the infrastructure.”

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