Precision UTC timestamps and GPS location/time/status are all made available via PCIe registers to the host CPU/application. Time trigger output and time event interrupts synchronized to GPS UTC are available under host control. GPS location/time/status data is Broadcast/Unicast out via backplane Ethernet with selectable bonding/failover behaviour.
The VPX337 can demodulate IRIG Amplitude Modulated (AM) signals and receive/transmit IRIG DC Level Shift (DCLS) signals. The disciplined clock, 1PPS, divided-down clocks, IRIG DCLS, and time trigger may all be output in any combination to the dual clock options on the VPX backplane channels (P0_REF_CLK+/- and/or P0_AUX_CLK+/).
The unit also acts as a Grand-Master Clock/Clock Bridge between GPS/PTP (1588)/IRIG/NTP to provide enhanced flexibility to the system design. The board also supports Synchronous Ethernet (SyncE) to eliminate clock drift at the Ethernet PHY level.
Additionally, a back-up battery or SuperCap provides non-volatile storage of the Almanac, Ephemeris and last position data to enable rapid ‘warm start’ re-acquisition, usually within 35 seconds. The module’s console is available via front serial or SSH via Ethernet, and locking/holdover status is available via IPMI sensors. A secondary serial port enables GPS NMEA data in/out.
The module also interfaces to the backplane via multiple options such as dual GbE to Ports 14 and 15, dual PCIe x4 to Ports 0-7, or 10GbE (XAUI) to Ports 0-7.