Design

USB 3.1 IP solution enables 10 Gbps data transfer speeds

2nd November 2014
Mick Elliott
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A USB 3.1 IP solution, consisting of Synopsys DesignWare USB 3.1 Device Controller, an IP Virtual Development Kit (VDK) and verification IP (VIP) has been designed to accelerate the development of high-performance storage, digital office and mobile system-on-chip (SoC) applications.

The DesignWare USB 3.1 IP solutions support 10 Gbps data transfer rates, power-down capabilities and compatibility with existing USB 3.0 software stacks and device protocols. Based on the DesignWare USB 3.0 Controller IP architecture, which has shipped in more than 100 million SoCs, the DesignWare USB 3.1 Device Controller IP enables designers to integrate USB 3.1 functionality with significantly less risk and faster time-to-market.

“As an active member of the USB-IF for more than 18 years, Synopsys continues to develop IP products that ease the integration and adoption of the latest USB specifications,” said Jeff Ravencraft, USB-IF president and COO. “Initial USB 3.1 products are expected to appear in early 2015 and the availability of integration-ready USB 3.1 IP is critical. Companies like Synopsys give designers the ability to more easily incorporate the USB 3.1 interface into their SoCs, pushing USB performance ever higher.”

The DesignWare USB 3.1 IP VDK, part of the Synopsys IP Accelerated initiative, helps developers quickly bring-up, enhance and optimize existing software for their specific DesignWare USB 3.1 Device Controller configuration.

The IP VDK consists of a reference virtual prototype that includes a processor subsystem reference design, a configurable model of the DesignWare USB 3.1 Controller IP, a Linux® software stack and reference drivers.

Software developers can use the IP VDK as a proven target for early software development, bring-up, debug and test in parallel with SoC development. Hardware developers can use the HAPS FPGA-based prototyping system for hardware/software integration and system validation of USB 3.1 designs, as demonstrated in November 2013.

Synopsys’ USB 3.1 VIP is based on Synopsys’ native SystemVerilog and native UVM architecture, offering ease of integration, high performance, configurability, coverage and debug to speed the protocol verification process.

The USB 3.1 VIP supports Verdi Protocol Analyser, a protocol-centric debug environment that substantially increases user productivity with protocol-aware features to simplify viewing and debug of complex protocols.

“As a leading provider of USB IP for more than a decade, Synopsys provides the high-quality IP designers need to meet their evolving power, performance and area requirements,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “With our extensive knowledge in developing USB IP, more than 3,000 USB design wins and billions of SoCs shipped with DesignWare USB IP, designers know they can rely on Synopsys when integrating the latest USB functionality into their SoCs.”

The DesignWare USB 3.1 Device Controller IP and USB 3.1 VIP are available now. The DesignWare USB 3.1 IP Virtual Development Kit is planned to be available in Q1 2015.

 

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