Software deployment results in 10% higher performance

"High-throughput chips are critical to success in providing end-to-end InfiniBand and Ethernet-based interconnect solutions to our customers," said Tzvika Shmueli, senior director, backend chip design at Mellanox Technologies. "With Design Compiler Graphical, we are experiencing 10 percent faster timing and very tight correlation to IC Compiler, which enables us to identify and fix design issues early in the flow. Design Compiler Graphical has also helped us reduce area and is now a standard component of our design flow."

Design Compiler Graphical addresses challenging design requirements at both established and emerging process nodes. It includes shared technology with the Synopsys IC Compiler^TM solution that takes physical effects, such as routing congestion and RC variation into consideration and delivers superior timing, area, routability and power results. The physical guidance passed to IC Compiler, brings synthesis timing and area estimations to within five percent of layout, resulting in fewer iterations and faster design closure.

"Market leaders, such as Mellanox, who are targeting high-performance data center solutions rely on Design Compiler Graphical to achieve aggressive timing objectives within tight schedules," said Bijan Kiani, vice president of marketing for Synopsys' Design Group. "The product's innovative synthesis technologies and tight links with the Galaxy Design Platform enable our customers to accelerate delivery of industry-leading products to their target markets."