Design

Safe and secure hypervisor and RISC-V RTOS support

22nd January 2021
Alex Lynn

At embedded world 2021 digital, Green Hills Software has announced that it is showcasing its µ-visor safe and secure embedded virtualisation hypervisor for microcontrollers. µ-visor is designed to support the emerging automotive cybersecurity requirements of ISO/SAE 21434 and UNECE WP.29 and to meet ISO 26262 ASIL D functional safety.

Available first for the Renesas RH850/U2A, µ-visor is the basis for safe and secure consolidation of multiple MCU-based systems onto a single multicore design.

Green Hills is also featuring its µ-velOSity RTOS, now available for RISC-V. IoT edge designs increasingly use RISC-V to execute time- and mission-critical software applications, often combined with Arm or Intel CPUs on a single SoC.

The µ-velOSity RTOS and development tools provide a single integrated development environment for debug and optimisation of heterogeneous processor SoC designs.

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