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Lauterbach and Gleichmann Electronics Research simplify hardware/software co-debugging

21st February 2010

ES Admin

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Efficient debugging techniques for architectures combining standard processors with programmable logic or CPUs that are embedded in programmable logic are demonstrated by Gleichmann Electronics Research and Lauterbach at booth 325, hall 10 during the embedded world 2010. Unlike Lauterbach′s TRACE32 PowerDebuggers, that use the JTAG interface to enable software developers to debug their embedded applications, Gleichmann′s Hpe®_JTAG boundary scan software is using the same physical interface to enable hardware developers to debug their PCBs and ICs.

In combination, these two tools complete one another and allow efficient hardware/software co-debugging. For example, while using Lauterbach′s TRACE32 PowerDebugger to step through embedded system code, Hpe_JTAG®/boundary scan can be used for non-intrusive signal observation to visualize the results of every line of code on the physical interfaces at the same time. In addition, developers can verify the flawless functionality of their hardware before looking for errors in their software. In the so called EXTEST mode, Hpe®_JTAG allows the generation and observation of any test pattern on the IOs of the scan chain to verify proper hardware behavior.

Hpe®_JTAG demo software can be downloaded free of charge from www.hpe-jtag.com. Lauterbach customers do not require any additional hardware. Instead TRACE32 PowerDebuggers can be used to give Hpe®_JTAG access to the JTAG chain.