Design

In-System Emulation Technology supports Stellaris Family of MCU from Luminary Micro

20th October 2009
ES Admin
GOEPEL electronic, the vendor of JTAG / Boundary Scan solutions compliant with IEEE Std. 1149.x, announces the development of a special model library for Stellaris Mixed Signal MCU from Luminary Micro to support the innovative emulation technology VarioTAP.
The libraries, described as VarioTAP models, are structured modularly as intelligent IP and enable a complete fusion of Boundary Scan test and JTAG emulation. Employing this technology, embedded or external Flash can be in-system programmed via the native processor function. Furthermore, VarioTAP® supports interlaced Bus Emulation Tests (BET) and System Emulation Tests (SET) for extended JTAG/Boundary Scan functionality.



“Many of our customers have chosen the Stellaris family with their ARM Cortex-M3 core and extended periphery equipment as their control processor. We are now able to support these projects”, says Karl Miles, Manager (UK & Ireland) for GOEPEL electronics based in Cambridge. “Now they can combine functional emulation tests, Boundary Scan tests, mixed signal test and high speed Flash programming on a multivalent level.”



The VarioTAP IP-models for Stellaris family MCUs with ARM Cortex-M3 core have been developed in cooperation with the company Testonica, recently affiliated into GOEPEL electronic’s GATE partner program. They enable Flash programming and numerous emulation test functions. The adaptive streaming technology of the TAP signals allows emulation tests to be executed in parallel or interactively with Boundary Scan tests within a test program, whereby the number of TAPs is unlimited. Using the hardware platform SCANFLEX®, e.g. up to 8 TAP can be actuated independently from or simultaneously to other I/O resources. Regarding the Flash programming, besides embedded Flash also externally connected Flash are supported, with the script generation done automatically. In addition to dynamic tests of externally connected components such as RAMs or I/O resources, the IP functions for bus emulation and system emulation enable the functional test of on-chip interfaces as well as the execution of a customer defined program code.



The use of VarioTAP® does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.



Due to the OEM cooperation with all leading vendors of In-Circuit Testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probe Testers (FPT) and Functionality Testers (FT), the new solution is available for production with immediate effect.



The new VarioTAP IP models are supported as standard starting from SYSTEM CASCON™ version 4.5, and are activated by the licence manager like the system software. SYSTEM CASCON™ is a professional JTAG/Boundary Scan development environment, developed by GOEPEL electronic, with currently more than 40 completely integrated ISP, test, and debug tools. Regarding the hardware, VarioTAP® is completely supported by the controllers of the ScanBooster® family, as well as by the hardware platform SCANFLEX®.

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