In-System Emulation Technology supports Intel XScale Architecture

“The support of the XScale architecture ranked fairly at the top of the wish list of our customers, that’s why we allowed it a high priority in our VarioTAP® development activities,” says Thomas Wenzel, co-founder of GOEPEL electronic and head of the Boundary Scan division.
Due to the improved multi functionality of our JTAG/Boundary Scan platform, the users are able, e.g. to achieve a significantly higher test depth and can handle high speed flash programming with the same instruments. Thus the handling is easier and additional programmers are no longer needed.

The VarioTAP® IP-models for the XScale processors support all possible scan chain configurations, even multi-processor applications and scan router implementations. The adaptive streaming technology of the Tap signals allows emulation tests to be carried out in parallel or interactively to Boundary Scan tests within a test program.
In the flash programming both NOR and NAND flash are supported, whereas the so-called bad block handling can be realised in a standardised or customised version.
The use of VarioTAP® does not require neither expert background knowledge, nor additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.

Due to the OEM cooperation with all leading vendors of In-Circuit Testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probe Testers (FPT) and Functionality Testers (FCT), the new solution is available for production with immediate effect.

The new VarioTAP® IP-models are supported beginning with SYSTEM CASCON™ version 4.4.2 and are activated by the licence manager like the system software. SYSTEM CASCON™ is a special JTAG/Boundary Scan development environment designed by GOEPEL electronic with currently 38 completely integrated ISP, test and debug tools. In regard to hardware, VarioTAP® is supported by the controllers of the ScanBooster® series and the hardware platform SCANFLEX®.