In-System Emulation Technology qualified for additional ARM Architecture

“Because of their attractive price/performance ratio, processors with ARM Coretx-M3 core play a decisive strategic role in new development projects for many of our customers from various industry segments. We’re glad to be able to support this”, says Karl Miles, Sales Manager (UK & Ireland) for GOEPEL electronics based in Cambridge. “Using our VarioTAP technology, Cortex-M3 architecture applicants can combine emulation tests with Boundary Scan tests, high-speed programming and PLD programming based on a single multivalent system platform for the first time. That means an increase in efficiency as well as cost reduction.”

The VarioTAP IP-models for ARM Cortex-M3 processors have been developed in cooperation with the company Testonica, recently affiliated into GOEPEL electronic’s GATE partner program. They enable Flash programming and numerous emulation test functions. All possible scan chain configurations from stand-alone operations, mixed operations with other JTAG devices up to the utilisation of scan routers are supported. The adaptive streaming technology of the TAP signals allows emulation tests to be carried out in parallel or interactively to Boundary Scan tests within a test program, whereby the number of TAPs is in principle unlimited. Utilising the hardware platform SCANFLEX, for instance up to eight TAP can be controlled independently and simultaneously to other I/O resources. In the Flash programming, embedded and external Flash are supported. The script generation is done automatically. In addition to dynamic testing of externally connected components such as RAM or I/O resources, the IP functions for bus simulation and system emulation enable the functional testing of on-chip interfaces as well as the execution of customer defined program codes.

The use of VarioTAP does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated. Due to the OEM cooperation with all leading vendors of In-Circuit Testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probe Testers (FPT) and Functionality Testers (FCT), the new solution is available for production with immediate effect.

The new VarioTAP IP-models are supported beginning with SYSTEM CASCON version 4.5., and are activated by the licence manager. SYSTEM CASCON is a special JTAG/Boundary Scan development environment designed by GOEPEL electronic with more than 40 completely integrated ISP, test and debug tools. In regard to hardware, VarioTAP is supported by the controllers of the ScanBooster series and the hardware platform SCANFLEX.