IC Compiler deployed for hierarchical design implementation

21st March 2014

Synopsys Inc

Nat Bowers

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MediaTek has initiated deployment of Synopsys' IC Compiler place and route solution for hierarchical design implementation. This collaboration extends the deployment of IC Compiler to the full flow starting from hierarchical design planning, through top and block-level place and route to final chip assembly.

MediaTek is focused on enabling customers to deliver premium products at an attractive price point. Characterised by longer battery life, fast processing times and fully-featured multimedia support, MediaTek chipsets include industry leading processor and graphics cores along with the latest in multiprocessing and wireless communications technology. To deliver these sophisticated chipsets and meet time to market windows, MediaTek wanted a predictable flow with fast turnaround times that could realise a design in the smallest area possible, with the lowest power and with fast performance. Having experienced the benefits of using IC Compiler at the block-level, MediaTek embarked upon a comprehensive collaboration to develop a hierarchical implementation methodology that would extend these benefits to SoC design. MediaTek's hierarchical implementation methodology with IC Compiler utilises key technologies such as: data flow analysis for improved macro placement; automatic support of multiple instantiated blocks; UPF-based hierarchical partitioning; and predictable flow starting from Design Compiler Graphical.

"MediaTek is a pioneer in the rapidly evolving mobile multimedia space, delivering unbeatable performance and power efficiency at an affordable cost," said Andrew Chang, Corporate Vice President, MediaTek. "Our excellent experience with IC Compiler on some of our very complex chips and the close partnership with Synopsys has convinced us to extend the usage to our hierarchical designs."

"As one of the fastest growing companies in the mobile platform space, MediaTek's success is marked by the innovative products they have introduced to their customers," said Antun Domic, Executive Vice President and General Manager, Design Group, Synopsys. "The decision to rely on IC Compiler for block as well as hierarchical design is an excellent testimonial to our close collaboration and the strength of IC Compiler to meet their challenging design needs in a timely manner."

MediaTek will present on this topic during Synopsys User Group on Tuesday, March 25, 2014.