Design

Floating Point FFT IP-Core Lands on Scalable Video Platform from Sundance

2nd October 2007
ES Admin
The new Digital Video Infrastructure Platform (DVIP) from Sundance features from three to eleven fixed-point DSPs, equating to as much as 50000 MIPS. Where that is still not sufficient floating-point calculation power for the most demanding real-life application, the DVIP gets a helping hand from closely-coupled Xilinx Virtex-4 FX60 FPGAs.
The FC100 Floating-point FFT IP-Core implemented in the FPGA is designed using a radix-32 architecture to make it flexible, portable, and use as few external memory resources as possible. Even then it’s possible to re-configure its complex data range from 256-point to 1M-point on-the-fly. It is ideally suited to high-powered image processing, radar or video encoding/decoding systems.

A single IP-Core will process 42 frames of a Video 2D transform each second on single 1024x1024 images and that will take less than 1/2 of the 128 XtremeDSP Slices available on a Virtex-4 FX60. The DVIP has three of these FPGAs as standard and up to four more FPGAs can be added.

The easiest way to visualize the power of combined fixed-point DSP and an FPGA enabled with the FC100 is a trip down memory lane, as Flemming Christensen, CTO of Sundance Multiprocessor Technology Ltd observes, I can vividly remember when I was given an Intel 8087 math coprocessor in the early '80s to increase the performance of my Workstation PC. It was awesome. The 8087 could do 50000 FLOPS (floating point operations per second) whereas the DVIP can offer 50000 Mega FLOPS and still costs less than my old PC.

The FC100 is available in either VHDL source format or can be supplied as a 'task' to integrate into the Xilinx' 'System Generator for DSP' or The MathWork’s 'Simulink' tools. It has been verified to the IEEE-754 standard and comes with full simulation and implementation support. A bit-true model for performance evaluation is provided free of charge for evaluation purpose.

Sundance has done an exceptional job integrating high performance DSP functions with Xilinx' FPGAs. By leveraging three high-performance Virtex-4 FX60 devices, the DVIP platform delivers impressive 2D transform performance, said Bruce Weyer, senior marketing director of the Programmable Solutions Group at Xilinx. The development of the FFT IP-Core as a co-processor is the perfect technology match for demanding image processing solutions.

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