Duo enable Astera Labs to develop PCIe 5.0 Retimer SoC

"At Astera Labs, we are intensely focused on delivering high quality solutions to our customers. We collaborated with Synopsys, a leader in EDA tools and PCIe technology, to ensure our products meet PCIe Gen-5 specifications and are geared for high volume manufacturing," said Jitendra Mohan, Chief Executive Officer at Astera Labs.

"Our High Performance Compute (HPC) infrastructure is hosted entirely on AWS and we heavily leveraged the scale of AWS and the cloud-scalability of Synopsys tools to accelerate our development schedule."

"We are excited to collaborate with Synopsys, a market leader in chip design and verification software. Together, we are providing groundbreaking cloud solutions for our mutual semiconductor customers, which represent a significant milestone, creating smart products and devices for solutions involving IoT, machine learning, artificial intelligence, and big data," said Terry Wise, Vice President, Channels and Alliances, Amazon Web Services.

"By leveraging the power of AWS, Synopsys is able to further semiconductor innovation and help Astera Labs reduce time-to-results."

"In our collaboration with industry leaders and our ecosystem, we continue to work closely with innovators to enable next-generation designs with a broad and complete solution," said Deirdre Hanford, Co-General Manager of the Design Group at Synopsys. "Our collaboration with pioneers such as Astera Labs breaks new ground in what can be achieved in combining leading EDA technology and cloud computing."