The Phyworks demonstration module supports single-channel asymmetric transmit and receive (1.25Gbit/s burst mode on the upstream and 10Gbit/s on the downstream) with sensitivity greater than -30dBm at 1e-3 bit error rate. A complete XFP solution, the receive path uses the PHY1090 10Gbit/s high sensitivity trans-impedance amplifier with the PHY1060 10Gbit/s integrated post amplifier, equaliser and re-timer, while the transmit path uses the PHY2078 1.25Gbit/s burst mode laser driver.
A key challenge for asymmetric 10G ONU design addressed by the Phyworks chipset is that of distortion in the module connector. Traditionally, separate clock recovery ICs are required to reduce the resulting jitter in the ONU. The PHY1060 removes this requirement by integrating a re-timer that ensures a high quality low jitter output from the XFP module which, when combined with the optional pre-emphasis stage enables error free 10G serial data transmission through the connector and PCB to the ONU MAC. In SFP+ applications too the PHY1060 equaliser and re-timer will also compensate for 10G inter symbol interference from the copper trace and connector, thus enabling both XFP and SFP+ form factors to be used for a 10G ONU.
A second challenge addressed by the Phyworks chipset is dispersion that can degrade a 10G signal when transmitted over a long distance of fibre using a standard low cost laser such as a distributed feedback laser (DFB). The patented equaliser technology in the PHY1060 allows users to include lower cost and higher launch power DFB lasers in the central office Optical Line Terminal (OLT), thereby extending network reach and increasing ONU sensitivity margins.
Simon McCaul, Product Line Manager FTTh and 1-4G products at Phyworks said, “With the future release of new 10G PON standards, system and module manufacturers are keen to investigate technologies that bring a reduction in 10G cost and a significant improvement in performance. Our demonstrator module uses an advanced chipset to achieve both and give customers a real head start in optimizing their system design.”