Design

Collaboration uses cloud to cut IC design schedules

17th June 2020
Mick Elliott

Cadence Design Systems has revealed the results of a three-way collaboration with TSMC and Microsoft focused on utilising cloud infrastructure to reduce semiconductor design signoff schedules.

Through this collaboration, common customers will have an accelerated path to complete timing signoff by adopting the Cadence Tempus Timing Signoff Solution and the Quantus Extraction Solution using TSMC technologies on the Microsoft Azure Cloud with the Cadence CloudBurst Platform.

By moving to the cloud, users from all vertical markets can achieve a significant productivity improvement without the constraints of on-premise hardware.

“Semiconductor designers are meeting or exceeding their power and performance requirements using advanced process technology. However, the increasingly complex advanced-node signoff requirements make it challenging to meet tight product schedules,” said Suk Lee, senior director of the Design Infrastructure Management Division at TSMC. “Working with Microsoft and Cadence, our cloud alliance has harnessed the scalability of the cloud with Cadence timing signoff solutions to ensure that our common customers can beat their performance goals and accelerate time to market for their silicon innovations.”  

Mujtaba Hamid, head of product management, Silicon, Electronics and Gaming at Microsoft Azure added, “Microsoft’s Azure Cloud platform is ideally suited for high-performance-compute (HPC) applications such as silicon design and signoff. We look forward to collaborating with Cadence and TSMC customers on their silicon HPC needs and enabling these customers to deliver the highest quality products and achieve their time-to-market goals.”

Both the Cadence Tempus Timing Signoff Solution and Quantus Extraction Solution feature massively parallel architectures that are optimal for use in the cloud.

Utilising distributed signoff technologies, the Tempus Timing Signoff Solution is production-proven in the cloud on large-scale TSMC advanced-node tapeouts. 

“Through our continued collaboration with TSMC and Microsoft, we’re making it easy for customers to offload their Tempus Timing Signoff Solution and Quantus Extraction Solution workloads to the cloud and reap the full benefits of our scalable solutions,” said Dr. Chin-Chi Teng, Senior Vice President and General Manager of the Digital & Signoff Group at Cadence. “Customers creating the most complex designs for today’s emerging market segments can look to the cloud to streamline their processes and provide a competitive advantage.”

The Cadence Tempus Timing Signoff Solution and Quantus Extraction Solution are part of the broader full flow digital suite, which provides customers with a fast path to design closure and better predictability.

The CloudBurst Platform provides fast and easy access to Cadence tools and is part of the broader Cadence Cloud Portfolio.

The digital and cloud portfolios support the Cadence Intelligent System Design strategy that enables customers to achieve system-on-chip (SoC) design excellence.

Featured products

Upcoming Events

View all events
Newsletter
Latest global electronics news