Collaboration expanded to optimise 7nm semiconductor processes

The collaboration has now been expanded beyond logic-only devices to include 3D NAND Flash, STT-MRAM and other device types.

“Leveraging Coventor’s technical expertise and its SEMulator3D platform has enabled us to solve real-world semiconductor integration and processing problems at the 7nm node,” said An Steegen, Senior Vice President of process technology, imec. “Our joint collaboration is helping the entire semiconductor industry lower the risks associated with moving to the latest process technologies by providing customers with proven, tested process development platforms and advancing the availability, yield and cost of next-generation semiconductor technology.”

A highlight of the collaboration has been a massive process simulation experiment to explore the effect of process variability in 7nm BEOL (back end of line) fabrication processes. Researchers used SEMulator3D to simulate an entire window of process variability, which would have required more than one million actual semiconductor wafers if conventional testing methods were used.

This experiment was made possible by the robust virtual fabrication environment of SEMulator3D using a fully codified 7nm process flow, along with the ability to support parallel distributed computing and a novel algorithm for submitting variation cases to the simulator. With these powerful tools, the team was able to produce key findings that will help advance 7nm semiconductor technology.

“We have worked with imec to accelerate the state of the art in semiconductor process technology useful in a broad range of next-generation devices such as Logic, 3D NAND Flash, STT-MRAM, and others," said David Fried, Chief Technical Officer, Coventor. “By providing our customers with a comprehensive virtual fabrication environment, plus our combined expertise, Coventor and imec are reducing the time and cost associated with moving to these emerging semiconductor nodes.”