Barco Silex’s AES-GCM core is designed to provide high performance within a small area. Thanks to its unique architecture, we propose a flexible solution enabling trade-off between area, performance and technology. The AES-GCM core is available for ASIC and FPGA technology. Its low area footprint enables implementation with mid-range FPGA devices.
The AES-GCM IP core is ideal for high speed networking and storage. The algorithm is well suited for applications like Optical Transport Network (OTN), broadband access and storage. AES-GCM is referenced in multiple standards such as, MACsec and IPsec.
“It is an obvious choice for networking applications that require high performance and efficient use of silicon resources.” said Sebastien Rabou, Crypto Product Manager of Barco Silex. “The easy integration combined with an unrivalled performance to cost ratio confirms the leadership of Barco Silex in terms of high quality cryptographic IP cores.”