Design

ASIP designer tools enable fast development of custom processor

29th June 2018
Alex Lynn
0

It has been announced by Synopsys, that RIKEN has successfully developed its high-performance application specific instruction set processor (ASIP) core for its molecular dynamics (MD) simulator using, by Synopsys' ASIP Designer tool.

By using ASIP Designer, the RIKEN design team developed its specialised ASIP from concept to gates in less than six months while achieving a performance level up to 30 times higher than existing processing solutions. RIKEN's large-scale MD simulator system consists of more than 8,000 instances of this specialised processor core, enabling researchers to analyse biomolecular dynamics and functions at a level more realistic than conventional simulations.

Makoto Taiji, Team Leader of the Biosystems Dynamics Research Centre at RIKEN, stated: "With Synopsys' reputation as the premier provider of ASIP development tools, we were confident that ASIP Designer would enable us to implement our specialised architecture within our aggressive project schedule. ASIP Designer enabled us to tune the instruction-set to run our specific algorithms 30 times faster than existing processors. This significantly reduces the calculation time needed, from a year to just a few weeks, to simulate important biomolecular interactions like the effect of new drugs."

Synopsys' ASIP Designer allowed RIKEN to use a high level specification of the processor to quickly model and analyse multiple processor architectures. Using this single input specification written in the nML processor description language, ASIP Designer automatically configured the SDK containing an instruction-set simulator, assembler, linker, debugger and C/C++ compiler, and also generated the synthesisable RTL design. Immediate availability of the compiler enabled RIKEN to run their C application code on the automatically-generated instruction-set simulator.

With this unique ‘compiler-in the-loop’ approach as well as the extensive profiling capabilities of the debugger, RIKEN rapidly analysed and explored ASIP architectures and instruction sets to find the optimal power and performance design points for the target application.

John Koeter, Vice President of Marketing for IP at Synopsys, commented: "The ability to customise and optimise processor architectures is extremely important for designers who have application specific requirements that cannot be met by standard processors. Synopsys' ASIP Designer tool gave RIKEN the ability to explore and optimise processor architectures for their unique computer system and enabled them to achieve superior processing performance, while accelerating the development of their SoC."

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