Arm Makes Multi-Chip Debug Affordable In End Product

The ARM SWD technology, introduced in 2004, is widely deployed in silicon and supported by a large number of tools vendors. SWD replaces the alternative 5-pin JTAG debug port providing all the normal debug functionality with just two pins, increasing debug performance for ARM Cortex™ processors, and avoiding the need to use scan chains for debug.

The new multi-drop SWD is fully backwards compatible, retaining existing single point-to-point host equipment connections, and enables a device to power down completely while that device is not selected, reducing power consumption. The ARM multi-drop SWD has been designed to be fully interoperable with the recently announced IEEE 1149.7 standard.

“We are delighted to provide the benefits of SWD to an even wider market of system developers. A proven and easy to support 2 pin debug solution is a key requirement for all major silicon providers and OEMs”, said Mike Inglis, executive vice president and general manager, Processor Division, ARM.

“SWD has been widely adopted in the industry and is supported by the ARM tools. This new multi-drop support enables the debugging of software running on multiple cores without the need to increase the number of debug pins, which delivers a cost effective solution for our customers” said John Cornish, executive vice president and general manager, System Design Division, ARM. “Support for multi-drop SWD will be added in our products during this year”.

“By accessing multiple devices through as single connection developers of complex products such mobile phones can now reap the full benefits of the ARM 2-pin debug solution,” said Stephan Lauterbach, General Manager Lauterbach GmbH. “We have worked closely with ARM on the development of the multi-drop SWD product to ensure that our tools are aligned and our customers can make the best use of this technology.”