The on-board, re-configurable FPGA interfaces to the AMC FCLKA and TCLKA-D via an MLVDS Cross Bar Switch (CBS). The module includes an oven-controlled crystal oscillator (OCXO) clock reference which generates precise protocol-fixed clocks routed to the FPGA to support SyncE over GbE and 10GbE.
It also has two banks of DDR4 (64-bit wide) giving 16 GB total memory, allowing for large buffer sizes to be stored during processing as well as for queuing the data to the host. Backplane fabric selection is by ordering option and FPGA load, including support for dual x4 PCIe.