Achronix selects Synopsys as its leading EDA partner

24th June 2009

Synopsys Inc

ES Admin

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Synopsys has announced that Achronix Semiconductor Corporation, maker of ultra-fast field-programmable gate arrays (FPGAs), has signed an expanded business agreement to establish Synopsys as its leading EDA partner for the design of its next generation FPGAs. As a result of the new multi-year agreement, Achronix has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms throughout its internal development and design flow.

“After an exhaustive evaluation, we selected Synopsys’ integrated tool suite for its leading support of advanced processes and its flexible customer support capability,” said John Lofton Holt, founder, chairman and CEO, of Achronix. “By leveraging an integrated Synopsys flow, we can more efficiently drive our designs towards advanced process nodes and maintain our path of delivering unprecedented FPGA performance to our customers.”

With this expanded agreement, Achronix has chosen products across Synopsys’ broad portfolio, including IC Compiler place-and-route technology; Design Compiler Ultra synthesis; Formality power-aware equivalence checking; PrimeTime SI signal integrity analysis ; Star-RCXT parasitic extraction; Hercules physical verification; TetraMAX automatic test pattern generation; the VCS MX, HSPICE, and HSIM simulators for analogue and digital verification; and DesignWare Library’s portfolio of synthesisable and verification IP.

“Achronix’s focus on delivering leading edge chips that combine the speed of ASICs with the flexibility of FPGAs is an excellent match to Synopsys’ broad technology portfolio,” said John Chilton, senior vice president of marketing and strategic development at Synopsys. “We look forward to helping them continue to innovate with unique programmable solutions at breakthrough levels of performance.”